Processor Design for Digital Flight Control Computer
نویسندگان
چکیده
This paper presents the design and FPGA implementation of a 32bit configurable micro controller. The micro controller contains a 32-bit processor based on RISC-V Instruction Set Architecture, Cache memories, interrupt support, multiplexed buses and a Debug Unit. The processor support all integer arithmetic. Cache memories have various sizes upto 16kB. Prioritized stacked interrupt control is present. The design achieves a peak frequency of 80MHz and utilises 14,462 Look-Up-Tables(LUTs) on Virtex-7 FPGA.
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